Why is this an issue?

Memory accesses (reads or writes to arrays, RAMs, or register files) must always stay within the defined bounds of the memory structure. Accessing indices outside the allocated range leads to undefined behavior in simulation, potential synthesis mismatches, and, most critically, serious >security vulnerabilities.

Compatibility matrix:

How to fix it

Code examples

Noncompliant code example

entity top is
  port (
    raddr : in std_logic_vector(9 downto 0);
    waddr : in std_logic_vector(9 downto 0);
    clk   : in std_logic;
    wen   : in std_logic;
    rdata : out std_logic_vector(7 downto 0);
    wdata : in std_logic_vector(7 downto 0)
  );
end top;

architecture rtl of top is
  type memory is array(0 to 800) of std_logic_vector(7 downto 0);
  signal sram : memory;
begin
  process (clk)
  begin
    if (rising_edge(clk)) then
      if wen = '1' then
        sram(conv_integer(waddr)) <= wdata;
      end if;
      rdata <= sram(conv_integer(raddr));
    end if;
  end process;
end rtl;