Why is this an issue?

Declaring multiple items on a single line reduces readability.

This rule enforces that there is at most one port declaration or mapping per line.

How to fix it

Code examples

Noncompliant code example

component my_component
  port(
    c, v : in std_logic
  );
end component;

Compliant solution

component my_component
  port(
    c : in std_logic;
    v : in std_logic
  );
end component;