Why is this an issue?

Using different vector directions in ranges makes the code harder to read and understand.

How to fix it

Code examples

Noncompliant code example

With default useDownto parameter value: true

architecture a of e is
  signal a : std_logic_vector(0 to 1) -- Noncompliant: Use 'downto' instead
begin
  ...
end;

Compliant solution

With default useDownto parameter value: true

architecture a of e is
  signal a : std_logic_vector(1 downto 0)
begin
  ...
end;