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CDC #20

Origin Flip-flop

Graph	Signal	Clock Domain	Flip-flop
	Signal: u1_plama.opt_cache2.u_cache.state_reg Usage: - cache.vhd#131 - cache.vhd#134 - cache.vhd#135	clk_reg (rising)	TOP (plasma_3e) > u1_plama (plasma) > opt_cache2.u_cache (cache) > cache.vhd#130

Target Flip-flop

Graph	Signal	Clock Domain	Flip-flop
	Signal: u2_ddr.cycle_count Usage: - ddr_ctrl.vhd#264 - ddr_ctrl.vhd#268 - ddr_ctrl.vhd#269 - ddr_ctrl.vhd#270 - ddr_ctrl.vhd#276 - ddr_ctrl.vhd#278	CLK_50MHZ (rising)	TOP (plasma_3e) > u2_ddr (ddr_ctrl) > ddr_ctrl.vhd#263

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