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CDC #28

Origin Flip-flop

Graph	Signal	Clock Domain	Flip-flop
	Signal: u2_ddr.state_prev Usage: - ddr_ctrl.vhd#219 - ddr_ctrl.vhd#258	clk_reg (rising)	TOP (plasma_3e) > u2_ddr (ddr_ctrl) > ddr_ctrl.vhd#218

Target Flip-flop

Graph	Signal	Clock Domain	Flip-flop
	Signal: u2_ddr.cycle_count Usage: - ddr_ctrl.vhd#264 - ddr_ctrl.vhd#268 - ddr_ctrl.vhd#269 - ddr_ctrl.vhd#270 - ddr_ctrl.vhd#276 - ddr_ctrl.vhd#278	CLK_50MHZ (rising)	TOP (plasma_3e) > u2_ddr (ddr_ctrl) > ddr_ctrl.vhd#263

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