Back to Design Hierarchy Report


Entity - pc_next

Summary

Name

Location

Description

pc_next

pc_next.vhd#16

Instantiations

Count: 1

Name

Location

Description

Details

u1_pc_next

mlite_cpu.vhd#182

View Instantiation Details

Generics

Count: 0

Ports

Count: 10

Name

Mode

Type

Description

clk

in

std_logic

reset_in

in

std_logic

pc_new

in

std_logic_vector ( 31 downto 2 )

take_branch

in

std_logic

pause_in

in

std_logic

opcode25_0

in

std_logic_vector ( 25 downto 0 )

pc_source

in

pc_source_type

pc_future

out

std_logic_vector ( 31 downto 2 )

pc_current

out

std_logic_vector ( 31 downto 2 )

pc_plus4

out

std_logic_vector ( 31 downto 2 )


Back to Design Hierarchy Report