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Entity - ram

Summary

Name	Location	Description
ram	ram_xilinx.vhd#44

Instantiations

Count: 0

Generics

Count: 2

Name	Type	Default value	Description
memory_type	string	“DEFAULT”
block_count	integer	1

Ports

Count: 6

Name	Mode	Type	Description
clk	in	std_logic
enable	in	std_logic
write_byte_enable	in	std_logic_vector ( 3 downto 0 )
address	in	std_logic_vector ( 31 downto 2 )
data_write	in	std_logic_vector ( 31 downto 0 )
data_read	out	std_logic_vector ( 31 downto 0 )

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