Back to Design Hierarchy Report

Entity - mult

Summary

Name	Location	Description
mult	mult.vhd#45

Instantiations

Count: 1

Name	Location	Description	Details
u8_mult	mlite_cpu.vhd#285

Generics

Count: 1

Name	Type	Default value	Description
mult_type	string	“DEFAULT”

Ports

Count: 7

Name	Mode	Type	Description
clk	in	std_logic
reset_in	in	std_logic
a	in	std_logic_vector ( 31 downto 0 )
b	in	std_logic_vector ( 31 downto 0 )
mult_func	in	mult_function_type
c_mult	out	std_logic_vector ( 31 downto 0 )
pause_out	out	std_logic

Back to Design Hierarchy Report