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Reset Domain Details

Summary

Name: Origin

Graph

Global

Local

Asynchronous

Synchronous

Active High

Active Low

Number of flip-flops
using this reset domain

Number of instances
using this reset domain

Complex: u1_plama.u1_cpu.u1_pc_next.reset_in
  - ROT_CENTER: plasma_3e.vhd#73 (Port)
  - u1_plama.u1_cpu.reset_reg: mlite_cpu.vhd#160 (Flip-flop)

Open Reset Hierarchy Graph

16/56 (28.57%)

4/15

Instances using this reset domain

Count: 4

Instance

Asynchronous

Synchronous

Active High

Active Low

TOP (plasma_3e) > u1_plama (plasma) > u1_cpu (mlite_cpu) > u1_pc_next (pc_next)

TOP (plasma_3e) > u1_plama (plasma) > u1_cpu (mlite_cpu) > u2_mem_ctrl (mem_ctrl)

TOP (plasma_3e) > u1_plama (plasma) > u1_cpu (mlite_cpu) > u4_reg_bank (reg_bank)

TOP (plasma_3e) > u1_plama (plasma) > u1_cpu (mlite_cpu) > u8_mult (mult)

Flip-flops using this reset domain

Count: 16

Asynchronous usage

Count: 16

mem_ctrl.vhd#165

mult.vhd#99

pc_next.vhd#59

reg_bank.vhd#89

Synchronous usage

Count: 0

Active-high usage

Count: 16

mem_ctrl.vhd#165

mult.vhd#99

pc_next.vhd#59

reg_bank.vhd#89

Active-low usage

Count: 0


Note that there could be fewer source code locations than the number of flip-flops because several flip-flops can be inferred from the same piece of code.


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