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# Entity - bus_mux

## Summary

| Name | Location | Description |
| --- | --- | --- |
|bus_mux|<linty-anchor href="//bus_mux.vhd#22">bus_mux.vhd#22</linty-anchor>||
## Instantiations

Count: 1

| Name | Location | Description | Details |
| --- | --- | --- | :---: |
| u5_bus_mux | <linty-anchor href="/mlite_cpu.vhd#249">mlite_cpu.vhd#249</linty-anchor> |  | [<img title="View Instantiation Details" src="/_static/images/icon_details.png" style="max-height: 25px; width: auto;" alt="View Instantiation Details">](module_2/instantiation_1.md) |


## Generics

Count: 0

## Ports

Count: 15

| Name | Mode | Type | Description |
| --- | --- | --- | --- |
|<linty-anchor href="//bus_mux.vhd#23">imm_in</linty-anchor>|in|std_logic_vector ( 15 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#24">reg_source</linty-anchor>|in|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#25">a_mux</linty-anchor>|in|a_source_type||
|<linty-anchor href="//bus_mux.vhd#26">a_out</linty-anchor>|out|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#28">reg_target</linty-anchor>|in|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#29">b_mux</linty-anchor>|in|b_source_type||
|<linty-anchor href="//bus_mux.vhd#30">b_out</linty-anchor>|out|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#32">c_bus</linty-anchor>|in|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#33">c_memory</linty-anchor>|in|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#34">c_pc</linty-anchor>|in|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//bus_mux.vhd#35">c_pc_plus4</linty-anchor>|in|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//bus_mux.vhd#36">c_mux</linty-anchor>|in|c_source_type||
|<linty-anchor href="//bus_mux.vhd#37">reg_dest_out</linty-anchor>|out|std_logic_vector ( 31 downto 0 )||
|<linty-anchor href="//bus_mux.vhd#39">branch_func</linty-anchor>|in|branch_function_type||
|<linty-anchor href="//bus_mux.vhd#40">take_branch</linty-anchor>|out|std_logic||


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