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# Entity - cache

## Summary

| Name | Location | Description |
| --- | --- | --- |
|cache|<linty-anchor href="//cache.vhd#21">cache.vhd#21</linty-anchor>||
## Instantiations

Count: 1

| Name | Location | Description | Details |
| --- | --- | --- | :---: |
| opt_cache2.u_cache | <linty-anchor href="/plasma.vhd#151">plasma.vhd#151</linty-anchor> |  | [<img title="View Instantiation Details" src="/_static/images/icon_details.png" style="max-height: 25px; width: auto;" alt="View Instantiation Details">](module_3/instantiation_1.md) |


## Generics

Count: 1

| Name | Type | Default value | Description |
| --- | --- | --- | --- |
|<linty-anchor href="//cache.vhd#22">memory_type</linty-anchor>|string|"DEFAULT"||
## Ports

Count: 9

| Name | Mode | Type | Description |
| --- | --- | --- | --- |
|<linty-anchor href="//cache.vhd#24">clk</linty-anchor>|in|std_logic||
|<linty-anchor href="//cache.vhd#25">reset</linty-anchor>|in|std_logic||
|<linty-anchor href="//cache.vhd#26">address_next</linty-anchor>|in|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//cache.vhd#27">byte_we_next</linty-anchor>|in|std_logic_vector ( 3 downto 0 )||
|<linty-anchor href="//cache.vhd#28">cpu_address</linty-anchor>|in|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//cache.vhd#29">mem_busy</linty-anchor>|in|std_logic||
|<linty-anchor href="//cache.vhd#31">cache_access</linty-anchor>|out|std_logic||
|<linty-anchor href="//cache.vhd#32">cache_checking</linty-anchor>|out|std_logic||
|<linty-anchor href="//cache.vhd#33">cache_miss</linty-anchor>|out|std_logic||


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[Back to Design Hierarchy Report](../design_hierarchy.md#vhdl-entities)