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# Component - RAM32X1D

## Summary

| Name | Location | Description |
| --- | --- | --- |
|RAM32X1D|<linty-anchor href="//mlite_pack.vhd#184">mlite_pack.vhd#184</linty-anchor>||


## Generics

Count: 1

| Name | Type | Default value | Description |
| --- | --- | --- | --- |
|<linty-anchor href="//mlite_pack.vhd#186">INIT</linty-anchor>|bit_vector|X"00000000"||


## Ports

Count: 15

| Name | Mode | Type | Description |
| --- | --- | --- | --- |
|<linty-anchor href="//mlite_pack.vhd#188">DPO</linty-anchor>|out|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#189">SPO</linty-anchor>|out|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#190">A0</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#191">A1</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#192">A2</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#193">A3</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#194">A4</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#195">D</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#196">DPRA0</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#197">DPRA1</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#198">DPRA2</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#199">DPRA3</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#200">DPRA4</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#201">WCLK</linty-anchor>|in|STD_ULOGIC||
|<linty-anchor href="//mlite_pack.vhd#202">WE</linty-anchor>|in|STD_ULOGIC||


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