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# Component - pc_next

## Summary

| Name | Location | Description |
| --- | --- | --- |
|pc_next|<linty-anchor href="//mlite_pack.vhd#205">mlite_pack.vhd#205</linty-anchor>||


## Generics

Count: 0



## Ports

Count: 10

| Name | Mode | Type | Description |
| --- | --- | --- | --- |
|<linty-anchor href="//mlite_pack.vhd#206">clk</linty-anchor>|in|std_logic||
|<linty-anchor href="//mlite_pack.vhd#207">reset_in</linty-anchor>|in|std_logic||
|<linty-anchor href="//mlite_pack.vhd#208">pc_new</linty-anchor>|in|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//mlite_pack.vhd#209">take_branch</linty-anchor>|in|std_logic||
|<linty-anchor href="//mlite_pack.vhd#210">pause_in</linty-anchor>|in|std_logic||
|<linty-anchor href="//mlite_pack.vhd#211">opcode25_0</linty-anchor>|in|std_logic_vector ( 25 downto 0 )||
|<linty-anchor href="//mlite_pack.vhd#212">pc_source</linty-anchor>|in|pc_source_type||
|<linty-anchor href="//mlite_pack.vhd#213">pc_future</linty-anchor>|out|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//mlite_pack.vhd#214">pc_current</linty-anchor>|out|std_logic_vector ( 31 downto 2 )||
|<linty-anchor href="//mlite_pack.vhd#215">pc_plus4</linty-anchor>|out|std_logic_vector ( 31 downto 2 )||


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