Why is this an issue?

Multiple declarations on a single line are more difficult to read. This rule checks if there is more than one port definition or mapping per line.

How to fix it

Code examples

Noncompliant code example

component my_component
  port(
    c, v : in std_logic
  );
end component;

Compliant solution

component my_component
  port(
    c : in std_logic;
    v : in std_logic
  );
end component;